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Corrections Thread | 167 comments | Create New Account
Comments belong to whoever posts them. Please notify us of inappropriate comments.
Prior Art, Anyone? - The Parallel Iron/IPNav Patents That Rackspace Is Going After ~pj
Authored by: Anonymous on Sunday, April 07 2013 @ 08:05 PM EDT
Clustered computing anyone? Available on the VAX 1994 or
thereabouts.

[ Reply to This | # ]

RAID1
Authored by: Anonymous on Sunday, April 07 2013 @ 08:39 PM EDT
surely the claims of the '662 patent simply describes RAID1

[ Reply to This | # ]

Prior Art, Anyone? - The Parallel Iron/IPNav Patents That Rackspace Is Going After ~pj
Authored by: JamesK on Sunday, April 07 2013 @ 10:08 PM EDT
"1. A storage system, comprising:

one or more memory sections, including

one or more memory devices having storage locations for storing data, and

a memory section controller capable of detecting faults in the memory
section and transmitting a fault message in response to the detected faults; and
one or more switches, including

one or more interfaces for connecting to one or more external devices; and

a switch fabric connected to one or more memory sections and the external
device interfaces and interconnecting the memory sections and the external
device interfaces based on an algorithm; and

a management system capable of receiving fault messages from the memory
section controllers and removing from service the memory section from which the
fault message was received, and wherein the management system is further capable
of determining an algorithm for use by a switch fabric in interconnecting the
memory sections and the external device interfaces, and instructing the switch
to execute the determined algorithm,

wherein an interface of the switch is connected to a non-volatile storage
device, and wherein the management system is further capable of instructing the
non-volatile storage device to load data into one or more of the memory sections
via the switch."

As I have mentioned previously on Groklaw, years ago, I used to be a computer
technician, working on minicomputers. One system I worked on was the Collins
C-8500, used in the Air Canada reservation system. One unique thing of this
system was that *EVERYTHING* was connected by what is now known as a
"LAN". All the various devices, such as tape stands, disk drives and
more were connected directly to this LAN. It was a Time Division Multiplexing
ring, rather than packet based, as is Ethernet. One feature of this system was
the "order wire" where things like status, including errors were
reported back to the CPU. That sounds suspiciously like the error reporting
claimed above. In fact the whole system had a lot of error detection built into
it. The "storage system" had several disk drives, again connected via
that LAN, which could certainly be considered "one or more memory devices
having storage locations for storing data". Then we get to "and
wherein the management system is further capable of determining an algorithm for
use by a switch fabric in interconnecting the memory sections and the external
device interfaces, and instructing the switch to execute the determined
algorithm". Well, the CPU could command the various devices to attach to
the ring, transfer data and then drop off. With the disk & tape drives out
on the LAN, that Collins system could certainly be considers a "Storage
Area Network" I worked on this system starting in 1978, but it and the
earlier B-8500, with a similar, but slower, TDM ring, had been in service for
several years by then.


http://www.vintagepaperads.com/1969-Collins-C-8500-Computers-Ad--New-C-System_p_
77473.html

http://www.antiquehistory.net/Collins/#_ftn1
Click on this link and scroll down to "1968: Monstrous Computers and Huge
Disk Drives" to see some B-8500 equipment as installed in the office where
I worked, along with some C-8500 gear. The cabinets marked C-8500 disk drive
were actually attached to the B-8500 system. They had hydraulic servos and the
heads were about the size of the platters in notebook drives today. The drives
connected to the C-8500 system I worked on were phsically much smaller, but just
about everything on both systems was water cooled.

---
The following program contains immature subject matter.
Viewer discretion is advised.

[ Reply to This | # ]

A lot of these things are obvious based on technology limitations
Authored by: artp on Monday, April 08 2013 @ 12:05 AM EDT
If the technology is such that component A can only operate
at speed i or less and component B can only operate at speed
j or less and component C can only operate at speed k or
less ....

Then certain design decisions are forced on you, no matter
how creative you are. Change the technology limitations and
WHAMMO!, you have new solutions available. None of it is
creative. You have only changed the parameters of the
simultaneous equations to allow different solutions.

I will try to look up some speed limits on things like 10M
LAN/IDE drives and 100M LAN/SCSI drives, etc to see when it
became feasible to build a SAN as a dedicated device.

SANs are just subsets of generalized computing. They are
degenerate cases of systems that can be applied more
broadly. When I came up with the solution of downloading
large files through TCP/IP over T1 instead of SNA over X.25,
it was obvious because [several] someone[s] had done the
preliminary footwork. I was just the one who had the
application that could benefit from it, and the problem that
made it worth pursuing. No rocket science here, but I was
the first person in the company to put TCP/IP file transfer
into production use [in that company].

Also, I remember using fabric switches back in 1998, and
there were at least two competitors at that time that I
used. Brocade was one. Maybe I'll remember the other.

I was working on HP9000 systems with redundant everything.
Maybe there too I will remember the application and the
architecture. One of the applications was for a NOC [Network
Operation Center] to be used to monitor multiple external
clients. The other was probably a telecom company billing
system.

Just wanted to get the juices flowing for people who may
have worked on similar things that I [and maybe they too]
just thought of as something that you just look up in the
instruction manual. System administrators and consultants
always come up with things that aren't quite within the box.
The world would not work as we know it if we didn't.

---
Userfriendly on WGA server outage:
When you're chained to an oar you don't think you should go down when the galley
sinks ?

[ Reply to This | # ]

How external is external?
Authored by: Ian Al on Monday, April 08 2013 @ 03:25 AM EDT
a switch fabric connected to one or more memory sections and the external device interfaces and interconnecting the memory sections and the external device interfaces based on an algorithm.
a switch controller that executes software, including a routing algorithm; and a selectively configurable switch fabric connected to one or more memory sections and the one or more interfaces and interconnecting the memory sections and the one or more interfaces based on the routing algorithm
I have in mind a memory system that has a memory fabric comprising one or more memory sections. The system has the problem that the speed or capacity of each memory strip in the memory section can vary considerably and also that segments of each strip can fail, but with the majority of the memory fabric having a considerable remaining life.

The memory system has an external controller which has a number of functions including a segment failure recovery algorithm, a memory section/strip/segment electromechanical switch controller, algorithms to deal with varying strip speeds/capacities and a spare segment system that swaps faulty segments out and swaps good segments in from a spare segment pool. The external controller is connected to the electromechanical switch and memory subsystem via a short, flat ribbon cable. The systems can have one or more memory sections (each containing multiple memory fields and associated electromagnetic interfaces. The controller provides a single virtual memory address space to the accessing system which it maps to known good sections in the memory fabric.

The system is, of course, the hard disk drive and the controller is usually a microprocessor controller external to the memory fabric which comprises concentric rings on one or more magnetic film platters (memory sections). The electromechanical memory switch is a swinging arm with a magnetic field detector at its tip(s) which can be switched to access each of the elements in the memory fabric. The different speeds are a result of the increased path lengths at the outer strips of memory fabric. For optimal read and write speed/capacity, an HDD will institute a zoned-bit sector creation algorithm which forms more sectors on outer memory tracks.

This IBM white paper (December 1997) explains that hard drive media defect management has always been an essential feature of hard drives since they were first manufactured.
Due to the complexity of HDD's and the nature of the technology, media defects are a fact of life in ALL HDD's manufactured today. However, HDD's employ effective error correction techniques and data threshold analysis and reassignments to help prevent data loss.
HDD defect management HDD's employ sophisticated defect management techniques to prevent data loss and promote data integrity. Earlier it was stated that there are many more sectors available in the drive beyond the drive advertised capacity. Typically each track has an additional sector beyond the required number of sectors and a drive may have thousands of spare sectors available. Those sectors are used in the event that a data sector becomes defective. In the case of defective sectors, the data is recovered (if possible) and rewritten onto the spare sector. The new sector is now part of the drive sector map and no loss of capacity or data has occurred.

---
Regards
Ian Al
Software Patents: It's the disclosed functions in the patent, stupid!

[ Reply to This | # ]

Prior Art, Anyone? - The Parallel Iron/IPNav Patents That Rackspace Is Going After ~pj
Authored by: Anonymous on Monday, April 08 2013 @ 03:56 AM EDT
Other areas it might be worth looking at (Sorry I have no specifics and will
have to rely on someone who knows in detail)

NUMA

Tandem NonStop

Christian Rovsing CR220

[ Reply to This | # ]

Prior Art, Anyone? - The Parallel Iron/IPNav Patents That Rackspace Is Going After ~pj
Authored by: Anonymous on Monday, April 08 2013 @ 05:12 AM EDT
Why is it the case that description does not matter? Should not description be
examined if it doesn't match the infringing product, then it's not infringing?
Otherwise I could claim a cat and describe actually a dog.

[ Reply to This | # ]

Prior Art, Anyone? - The Parallel Iron/IPNav Patents That Rackspace Is Going After ~pj
Authored by: Anonymous on Monday, April 08 2013 @ 06:11 AM EDT
I was at CERN in the early nineties. VAX clusters were all over the place, but
the functionality was mostly nfs-like, i.e. exporting disk volumes to other
machines. The patent looks to me more RAID-like. Multi disk volumes with
redundancy and some volume manager that deals with failures.

Tandem computers, later bought by digital and subsequently HP had
non-stop-business machines in the middle eighties. Disk, and everything else,
was doubled. It was supposed to always keep running and switch to the mirror
volume after a crash. The crashed disked could than be hot-swapped.

Nicolo

[ Reply to This | # ]

Non-infringement, anyone?
Authored by: scav on Monday, April 08 2013 @ 06:54 AM EDT
It seems the declaratory judgement sought is not for invalidation of the
patents (which is hard because of presumed validity and such nonsense) but
for non-infringement, which may be a lower hurdle to clear.

If anyone has reasons why HDFS doesn't infringe the patents, or the claims
don't accurately describe what HDFS does, then speak up, because that is
another prong of the defence against the trolls too.

Non-infringement was a big part of why Oracle's Java patent attacks against
Google fell apart - the language of the claims was found to describe
something other than what dalvik actually did (and other than what the JVM
did too, funnily enough).

---
The emperor, undaunted by overwhelming evidence that he had no clothes,
redoubled his siege of Antarctica to extort tribute from the penguins.

[ Reply to This | # ]

Corrections
Authored by: Anonymous on Monday, April 08 2013 @ 08:31 AM EDT
I don't have an account - so can someone create the
correct/permanent thread sometime?

My correction:
So, the target they are going after Hadoop -> So, the target
they are going after is Hadoop

[ Reply to This | # ]

Off Topic - Someone Signed In Please create a thread and copy
Authored by: Anonymous on Monday, April 08 2013 @ 09:43 AM EDT

Since somehow no one has after 24 hours....

Wayne
http://madhatter.ca

[ Reply to This | # ]

Maybe some prior art in virtual memory systems?
Authored by: NobodyYouKnow on Monday, April 08 2013 @ 11:05 AM EDT
Some of claims in 7197662 look reminiscent of what happens in paging virtual
memory systems.

The memory sections would be RAM pages, the faults would be page faults, and the
non-volatile storage device would be the swap partition or file.

[ Reply to This | # ]

Corrections Thread
Authored by: artp on Monday, April 08 2013 @ 11:10 AM EDT
Finally - a non-anonymous corrections thread.

I was so tired when I got home last night I didn't notice the
lack of canonicals.

---
Userfriendly on WGA server outage:
When you're chained to an oar you don't think you should go down when the galley
sinks ?

[ Reply to This | # ]

Off Topic Thread
Authored by: artp on Monday, April 08 2013 @ 11:11 AM EDT
What were we talking about again? Not here!


---
Userfriendly on WGA server outage:
When you're chained to an oar you don't think you should go down when the galley
sinks ?

[ Reply to This | # ]

News Picks Thread
Authored by: artp on Monday, April 08 2013 @ 11:12 AM EDT
URL, please.

---
Userfriendly on WGA server outage:
When you're chained to an oar you don't think you should go down when the galley
sinks ?

[ Reply to This | # ]

Comes Goes Here
Authored by: artp on Monday, April 08 2013 @ 11:14 AM EDT
See the link above for details: "Comes v. MS"

---
Userfriendly on WGA server outage:
When you're chained to an oar you don't think you should go down when the galley
sinks ?

[ Reply to This | # ]

SGI - multi-processing Units
Authored by: capt.Hij on Monday, April 08 2013 @ 12:40 PM EDT
In the mid to late nineties SGI was building multiple
processor, shared memory machines which allowed you to
purchase separate boards. When you added a new board you
essentially added a multi-processing computer with shared
memory within that board. Those machines must have required
solutions like those described above.

Also, any multi-threaded application has to implement those
sorts of constraints in software. Anybody doing multi-
threaded applications prior to that date must have a
rudimentary application of those techniques.

[ Reply to This | # ]

Promise not to invalidate
Authored by: Anonymous on Monday, April 08 2013 @ 01:25 PM EDT

Requiring a promise not to invalidate one's patents speaks rather strongly to one's own belief in the validity of one's patents.

RAS

[ Reply to This | # ]

Prior Art, Anyone? - A question for Mark and PJ
Authored by: webster on Monday, April 08 2013 @ 02:37 PM EDT
.

This is a question for a patent attorney.

With the understanding that Prior Art is used to attack the
validity of a patent by showing that the patent is not new
or innovative, ....

Can the Prior Art also be used:

1) ... to show that the alleged infringement practices the
Prior Art(s) and not the patent; and ...

2) ... to argue to the extent that the alleged infringement
practices the prior art, the damages must be diminished?

Thanks.

~webster~

.

[ Reply to This | # ]

One last thing, I'm noticing. A Storage system can also be temporary storage
Authored by: celtic_hackr on Tuesday, April 09 2013 @ 01:34 AM EDT
Nothing in the patents indicates it requires storage in a harddisk or other
media. A RAM storage system is just as pertinent. Hence why I've been
highlighting RAM, ROM and the like. Nothing in these patents implements anything
that wasn't known already in the 1970s. Why even UNISYS and it's predecessor
Burroughs implemented everything in these patents. Also, while not pertinent
full-duplex Ethernet cards also have crossbar switching or fabric switching, or
matrix switching, whichever term floats your boat.

We should all sue the PTO for all our lost time, due to the gross-negligence,
imo, in approving patents that should never have been granted. I don't care what
their excuse is, understaffed, not allowed to look in certain places. Doesn't
matter. They shouldn't be granting patents for things that have been in the
field for a decade.

If they don't know they granted patents for an old invention, then they aren't
qualified to grant them in the first place. I'm pretty sure I'd be locked up
pretty quick for performing brain surgery or practicing law, and claiming
ignorance of not knowing there were actual qualified brain surgeons or lawyers
who could have done it wouldn't fly as an excuse. Time for bed, I'm getting
cranky.

[ Reply to This | # ]

Look for telecom HW
Authored by: Anonymous on Tuesday, April 09 2013 @ 02:53 AM EDT
Nokia Telecommunications (now NSN) phone switches have had 2N and N+1 backup for
a very long time (since end of 1980's at least). This can be said to include
"memory" since many of the processes running on the hardware implement
just a kind of database (for subscriber data, billing and so on). The units
communicate on a message bus, in failure case requests are routed to a spare
unit with no downtime.

Probably Nokia/NSN has even patents about aspects related to this, at one time
they tried to make patents of everything. In any case handling failures on the
fly has always been a normal requirement in traditional telecoms, so you should
look for prior art there, either on patents or trade publications.

[ Reply to This | # ]

US5134619 from 1990 seems pretty much the same patent
Authored by: bugstomper on Tuesday, April 09 2013 @ 06:04 AM EDT
This looks like a remarkably close match, or am I missing something?

US 5134619 A Failure-tolerant mass storage system

Abstract

A mass memory system for digital computers is disclosed. The system has a plurality of disk drives coupled to a plurality of small buffers. An Error Correction Controller is coupled to a plurality of X-bar switches, the X-bar switches being connected between each disk drive and its buffers. Data is read from and written to the disk drives in parallel and error correction is also performed in parallel. The X-bar switches are used to couple and decouple functional and nonfunctional disk drives to the system as necessary. Likewise, the buffers can be disconnected from the system should they fail. The parallel architecture, combined with a Reed-Solomon error detection and correction scheme and X-bar switches allows the system to tolerate and correct any two failed drives, allowing for high fault-tolerance operation.

Comparing claim 1 of '388 to this patent's Claim 2 and 3:

A storage system A system for storing data

one or more memory sections a plurality of memory storage means

one or more memory devices having storage locations for storing data a plurality of output buffer means

a memory section controller capable of detecting faults in the memory section control means, coupled to the error detection and correction means, for controlling the error detection and correction means.

and transmitting a fault message in response to the detected faults; control means is additionally coupled to the data storage means and the buffer means, the control means receiving from the data storage means and the buffer means the locations of failed buffer means and failed data storage means, the control means electronically decoupling the failed buffer means and/or data storage means from the system.

one or more switches, including one or more interfaces for connecting to one or more external devices; a plurality of switching means, each switching means being coupled both to a data storage means by a bi-directional bus means and to a buffer means by a bi-directional bus means

a switch controller that executes software, including a routing algorithm; and (see below)

The rest of '388 Claim 1 is pretty wordy and is repeated elsewhere on this page, but I think Claims 4, 6, and 7 cover that exactly:

4. An error correction system for a plurality of data storage means comprising:

a plurality of data buffer means coupled to the data storage means; and

error correction means coupled to the data buffer means and the data storage means, the error correction means receiving data from both the data buffer means and the data storage means, detecting and correcting errors in the received data and transmitting the corrected data to the data buffer means and the data storage means.

6. The system of claim 5 further comprising a plurality of switches coupling said data buffer means to said data storage means and control means coupled to said switches for electronically removing from the system any data storage means and data buffer means which transmits erroneous data.

7. The system of claim 4 further comprising a plurality of switches coupling said data buffer means to said data storage means and control means for routing data from any data buffer means to any data storage means and from any data storage means to any data buffer means.

[ Reply to This | # ]

Prior Art, Anyone? - The Parallel Iron/IPNav Patents That Rackspace Is Going After ~pj Updated 2Xs
Authored by: iraskygazer on Friday, April 19 2013 @ 12:33 PM EDT
Doesn't the simple inclusion of the word 'algorithm' immediately create
uncertainty about the validity of the patent?
Is an algorithm patentable? And what about those things in the patent that touch
the algorithm. When did we start patenting mathematics?

[ Reply to This | # ]

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