U.S. Patent
7,930,337:
Claim 1 and it's dependent claims - "A computer program, disposed
on a computer readable storage medium, comprising instructions". Beauregard
claims recently discredited by the CAFC. (Cybersource v. Retail Decisions). See
( If the software
method is not patentable, then neither is the “computer readable medium”),
at Patently-O.
Claim 9 and it's dependent claims "A computer-implemented
method to multiply two numbers, the method comprising:". Same Patently-O
article quoting Abele in Cybersource, ("Abele made clear that the
basic character of a process claim drawn to an abstract idea is not changed by
claiming only its performance by computers, or by claiming the process embodied
in program instructions on a computer readable medium").
Claim 17 and it's
dependent claims, "A system, comprising: circuitry to multiply two numbers, the
circuitry to:". Prior Art, I'm thinking reconfigurable instruction computers, in
particular Stretch Inc's, U.S. 6,954,845, 'Reconfigurable
Instruction Set Computing', although I'd search for more prior art. The idea
here is something with programmable hardware that can do "segment A into
multiple segments ax, and an additional set ah, wherein A is a binary
representation of one of the two numbers and A comprises n bits corresponding to
the multiple segments ax and at least one most significant bit corresponding to
the additional set ah, and wherein ah comprises the at least one most
significant bit of A; segment B into multiple segments, bx, and an additional
set, bh, wherein B is a binary representation of the other of the two numbers
and B comprises n bits corresponding to the multiple segments bx and at least
one most significant bit corresponding to the additional set bh, and wherein bh
comprises the at least one most significant bit of B, wherein x represents an
ordinal of each segment, h represents a most significant bit position of each
additional set and n is greater than a native word size of the system; perform
Karatsuba multiplication of the segments, ax, of A and, the segments, bx, of B
to generate a result; and adjust the result of the Karatsuba multiplication if a
value of at least one of ah and bh is not zero to obtain a multiplication result
of the two numbers". With a small enough segment size (like the '337 example
s=4), multiplication can be done with a look up table.
A Round of the
Digital Encryption Algorithm (DES) could be completed in one reconfigured
instruction - normally taking somewhere around 1200 instructions in a computer,
the Key Schedule could be precomputed (using a different reconfigured
instruction). The Initial Permutation and Final Permutation could be done by
the same reconfigured Instruction by performing an 8 bit logical shift on the
L16R16 block to perform the Left Right swap.
The
logic array for an instruction is big enough to contain the example numbers in
the '337 patent, and extending that to larger numbers would be 'obvious' to a
person having ordinary skill in the art of programming the Stretch invention at
the time the '337 patent was filed (June 27, 2006). It would seem that the
Stretch, Inc. S5 family of Extensa processors with their Instruction Set
Extension Fabric would qualify for "circuitry to:". You could note claim 17 is
a "means plus function" claim and not terribly well enabled in the patent either
('the circuitry to' isn't taught).
I'd imagine infringement action on the
'337 patent to be defensible. [ Reply to This | Parent | # ]
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