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| Authored by: dio gratia on Saturday, May 12 2012 @ 04:56 PM EDT |
VHDL refers to two types of static values, separated by when they are known to
be static. Essentially at 'compile' time and 'linking' time (analysis time and
elaboration time).
When implementing JIT in VHDL and generating code directly (analogous to
bytecode) deferred static values (globally static) are fixed after code
generation, as a result of combining objects, which can be late-bound (the
equivalent of link time). Locally static values as you might expect are those
that are found unambiguously in source code. during analysis, while globally
static expressions are essentially externally defined and bound at elaboration
time.
The scope of the patent in question appears to address binding values at
elaboration time, late binding. It isn't clear when you could find a JIT VHDL
compiler publicly available, likely around the early 1990's. Any source code
for such would have been published (made public) after the turn of the
millennium. I know of two GNU General Public License (GPL) licensed VHDL JIT
implementation. Neither one appear to infringe the patent, as Google has
demonstrated other methods are available.
You could contemplate that the patent was the result of a search for language to
cover a topic needing a patent. It may be remarkable that the patented method
was actually utilized by the inventor's employer given the lack of distinctive
performance or other compelling reason (other than, perhaps, patent-ability).
(VHSIC Hardware Description Language, VHSIC - Very High Speed Integrated
Circuit, a 1980's era Defense program, IEEE Std 1076-1987/2002/2008, MIL-HDBK-62
1996)[ Reply to This | Parent | # ]
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